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- W2130742184 abstract "A 2.5 Gbit/s monolithic clock and data recovery integrated circuit (CDR IC) based on a novel duplicated phase-locked loop (PLL) technique has been fabricated using 0.5 /spl mu/m Si bipolar technology. This CDR IC operates more stably in that it can tolerate greater variations in temperature and supply voltage while continuing to meet the specifications for jitter characteristics stipulated in the ITU-T recommendations." @default.
- W2130742184 created "2016-06-24" @default.
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- W2130742184 date "1999-01-01" @default.
- W2130742184 modified "2023-09-23" @default.
- W2130742184 title "2.5 Gbit/s clock and data recovery circuit IC using novel duplicated PLL technique" @default.
- W2130742184 cites W2127798176 @default.
- W2130742184 doi "https://doi.org/10.1049/el:19990294" @default.
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