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- W2134747615 abstract "In this paper we propose an efficient vectorized low density parity check (LDPC) decoding scheme based on the min-sum algorithm and the horizontal scheduling method. Also, the well known forward-backward algorithm, used in the check-node messages update, is improved. Results are presented for 32 and 16 bits logarithm likelihood ratio messages representation on a high performance and modern fixed point DSP. The single instruction multiple data (SIMD) feature was explored in the 16 bits case. Both regular and irregular codes are considered." @default.
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- W2134747615 date "2006-09-04" @default.
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- W2134747615 title "Serial LDPC decoding on a SIMD DSP using horizontal scheduling" @default.
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- W2134747615 doi "https://doi.org/10.5281/zenodo.39462" @default.
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