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- W2135163411 abstract "A memory array is considered a collection of RAM chips interconnected via data lines, row-select lines and wordselect lines. The stuck-at and bridging fault models are assumed for those lines. For each type of line an algorithm to locate the fault, in the presence of possible faults in thle other lines and possible faults in the RAM chips, is presented. The algorithms are proven to be correct and an analysis of their robustness (insensitivity to other faults in the imemory anay) is given. The sequence in which the tests have to be performed is determined. Index Terms .. RAM testing, board testing, bridging faults, fault location." @default.
- W2135163411 created "2016-06-24" @default.
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- W2135163411 date "2005-08-24" @default.
- W2135163411 modified "2023-09-27" @default.
- W2135163411 title "Locating Bridging Faults in Memory Arrays" @default.
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- W2135163411 doi "https://doi.org/10.1109/test.1991.519733" @default.
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