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- W2135360167 abstract "This paper presents a detailed overview of the process steps involved in the hybrid integration process of III-V infrared detector arrays and silicon readout electronics. This process is divided in distinct parts: the postprocessing of the Silicon readout circuit, the Indium solderbump formation by electroplating and the flip-chip process. In contrast to commercially available hybrid arrays, the indium solderbump technology is applied to the III-V array only and not to the silicon readout. This causes specific requirements to the III-V metallization sequence prior to electroplating in order to obtain proper reflow. Two different silicon postprocessing schemes are described. Arrays of 128/spl times/128, 256/spl times/256 and 320/spl times/256 In(Ga)As and InAsSb photovoltaic infrared detectors have been integrated with dedicated in-house and commercial readout using this process. The feasibility of achieving 10 /spl mu/m hybrid integration pitch is also shown." @default.
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- W2135360167 date "2003-02-01" @default.
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- W2135360167 title "Technology for very dense hybrid detector arrays using electroplated indium solderbumps" @default.
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- W2135360167 doi "https://doi.org/10.1109/tadvp.2003.811550" @default.
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