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- W2135527638 abstract "We introduce a framework for computing upper bounds of WCET for hardware with caches and pipelines. The methodology we propose consists of 3 steps: 1) given a program to analyse, compute an equivalent (WCET-wise) abstract program, 2) build a timed game by composing this abstract program with a network of timed automata modelling the architecture, and 3) compute the WCET as the optimal time to reach a winning state in this game. We demonstrate the applicability of our framework on standard benchmarks for an ARM9 processor with instruction and data caches, and compute the WCET with UPPAAL-TiGA." @default.
- W2135527638 created "2016-06-24" @default.
- W2135527638 creator A5000548831 @default.
- W2135527638 date "2011-06-01" @default.
- W2135527638 modified "2023-09-30" @default.
- W2135527638 title "Timed Games for Computing WCET for Pipelined Processors with Caches" @default.
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- W2135527638 doi "https://doi.org/10.1109/acsd.2011.15" @default.
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