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• W2136567733 abstract "Controllable-polarity transistors exhibit a device-level configurability. Indeed, they can be dynamically configured between n- type and p-type. Such property can be exploited in Field Programmable Gate Arrays (FPGAs) to replace traditional Look-Up Tables (LUTs) by more powerful configurable units. We report here on a new FPGA logic block architecture, called MCluster, that takes a direct advantage of configurable transistors. The performance of the approach is evaluated and compared to its traditional Complementary Metal-Oxide- Semiconductor (CMOS) counterpart at 22-nm technology node. We note an average saving of 64% in area×delay×power product." @default.
• W2136567733 created "2016-06-24" @default.
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• W2136567733 date "2014-05-01" @default.
• W2136567733 modified "2023-09-30" @default.
• W2136567733 title "Novel configurable logic block architecture exploiting controllable-polarity transistors" @default.
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• W2136567733 doi "https://doi.org/10.1109/recosoc.2014.6861338" @default.
• W2136567733 hasPublicationYear "2014" @default.
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