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• W2138952066 abstract "The cost-efficient implementation of video codecs requires a set of methodologies and decision taking at different levels in the design flow. We combine upfront algorithmic tuning with memory centric optimizations to transform the video application into a system consisting of functional blocks with localized data processing and a tailored memory hierarchy. This memory optimized functional description is the leverage for the cost-efficient mapping of the system on integrated multimedia platforms. It closely reflects the real implementation constraints and consequently allows for steering the architecture selection in a correct way. The proposed approach is demonstrated on a MPEG-4 video encoder and leads to its implementation as a pipelined system. Hardware development of the motion estimation validates that the high-level memory centric concepts are applicable and realizable at the lowest level. The motion estimation kernel supports up to 30 CIF f/s with minimized processing element requirements and data input rates." @default.
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• W2138952066 date "2005-05-01" @default.
• W2138952066 modified "2023-10-01" @default.
• W2138952066 title "Memory centric design of an MPEG-4 video encoder" @default.
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• W2138952066 doi "https://doi.org/10.1109/tcsvt.2005.846430" @default.
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