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• W2139969307 abstract "Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processors reach the synchronization point simultaneously. When relaxing this assumption, we demonstrate that the optimum degree of combining trees is not four as previously thought but increases from four to as much as 128 in a 4K system as the load imbalance increases. The optimum degree calculated using our analytic model yields a performance that is within 7% of the optimum obtained by exhaustive simulation with a range of degrees. We also investigate a dynamic placement barrier where slow processors migrate toward the root of the software combining tree. We show that through dynamic placement the synchronization delay can be reduced by a factor close to the depth of the tree, when sufficient slack is available. By choosing a suitable tree degree and using dynamic placement, software barriers that are scalable to large numbers of processors can be constructed. We demonstrate the applicability of our results by performing measurements on a small SOR relaxation program running on a 56-processor KSR1." @default.
• W2139969307 created "2016-06-24" @default.
• W2139969307 creator A5058407511 @default.
• W2139969307 creator A5068763494 @default.
• W2139969307 date "1995-01-01" @default.
• W2139969307 modified "2023-09-26" @default.
• W2139969307 title "Impact of Load Imbalance on the Design of Software Barriers" @default.
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