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- W2140077908 abstract "The performances of high-frequency two-stage pipeline 32-bit carry lookahead adders are evaluated in this paper with the following three different implementations: silicon MOSFET (Si-MOSFET) domino logic, Si-MOSFET NP dynamic CMOS, and carbon nanotube MOSFET (CN-MOSFET) NP dynamic CMOS. While providing similar propagation delay, the total area of CN-MOSFET NP dynamic CMOS adder is reduced by 35.53% and 77.96% as compared to the conventional Si-MOSFET domino and Si-MOSFET NP dynamic CMOS adders, respectively. Miniaturization of the CN-MOSFET NP dynamic CMOS circuit reduces the dynamic switching power consumption by 80.54% and 95.57% as compared to the Si-MOSFET domino and Si-MOSFET NP dynamic CMOS circuits, respectively. Furthermore, the CN-MOSFET NP dynamic CMOS adder provides up to 99.98% savings in leakage power consumption as compared to the silicon circuits that are evaluated in this study." @default.
- W2140077908 created "2016-06-24" @default.
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- W2140077908 date "2013-11-01" @default.
- W2140077908 modified "2023-09-25" @default.
- W2140077908 title "A comparison of high-frequency 32-bit dynamic adders with conventional silicon and novel carbon nanotube transistor technologies" @default.
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- W2140077908 doi "https://doi.org/10.1109/isocc.2013.6863980" @default.
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