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- W2141569057 abstract "This paper describes a data output buffer which shows a reduced switching noise over wide-range of loading conditions. The proposed output buffer employs load-adaptive circuitry to achieve bounded delay regardless of loading condition. For that purpose, a load monitoring circuit is embedded in the output buffer. The adaptive control of driving current enables the switching noise to be kept at a minimum value. The experimental chip with a 0.61 /spl mu/m CMOS technology shows a reduced switching noise level, 15%/spl sim/35% of conventional buffer while the transition time is bounded within 7 ns for loading capacitance up to 100 pF." @default.
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- W2141569057 date "2003-01-20" @default.
- W2141569057 modified "2023-09-27" @default.
- W2141569057 title "A load-adaptive, low switching-noise data output buffer" @default.
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- W2141569057 doi "https://doi.org/10.1109/iscas.1999.777800" @default.
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