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- W2141841284 abstract "On-FPGA communication is becoming more problematic as the long interconnection performance is deteriorating in technology scaling. In this paper, we address this issue by presenting a new wave-pipelined signaling scheme to achieve high-throughput communication in FPGA. The throughput and power consumption of a wave-pipelined link have been derived analytically and compared to the conventional synchronous link. Two circuit designs are proposed to realize wave-pipelined link using FPGA fabrics. The proposed approaches are also compared with conventional synchronous and asynchronous pipelining techniques. It is shown that, the wave-pipelined approach can achieve up to 5.66 times improvement in throughput versus the synchronous link and 13% improvement in power consumption and 35% improvement in delay versus the synchronous register-pipelining. Also, trade-offs between power, speed and area between the proposed and conventional designs are studied." @default.
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- W2141841284 date "2008-12-01" @default.
- W2141841284 modified "2023-09-25" @default.
- W2141841284 title "Wave-pipelined signaling for on-FPGA communication" @default.
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- W2141841284 doi "https://doi.org/10.1109/fpt.2008.4762360" @default.
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