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- W2142362663 abstract "This paper presents a new logic partitioning method for optimizing large scale circuits. The proposed method partitions a given circuit into transitive fanin-disjoint sub-circuits by matrix operations, so that various optimization methods can be applied to each partitioned sub-circuit instead of the whole circuit. Experimental results show that the proposed method achieves high-quality design comparable to the one optimized for the whole circuits, with much shorter time(1/20). Thus, the circuits with over 10,000 gates can be optimized by the proposed partitioning." @default.
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- W2142362663 date "1995-01-01" @default.
- W2142362663 modified "2023-09-26" @default.
- W2142362663 title "A partitioning-based logic optimization method for large scale circuits with Boolean matrix" @default.
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- W2142362663 doi "https://doi.org/10.1145/217474.217605" @default.
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