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• W2142654262 abstract "This paper describes the fabrication and electrical behavior of a fully-depleted SOI technology using a direct metal gate and high-k dielectric integrated on 300 mm SOI wafers for low power applications. We report ultra-thin FDSOI MOS transistors with WN metal gate (capped with TiN) on HfSiON gate dielectric. Performance at both device and circuit level are demonstrated and compared with TiN midgap metal gate." @default.
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• W2142654262 date "2007-01-01" @default.
• W2142654262 modified "2023-10-18" @default.
• W2142654262 title "Fully-depleted SOI CMOS technology using W<inf>X</inf>N metal gate and HfSi<inf>x</inf>O<inf>y</inf>N<inf>Z</inf> high-k dielectric" @default.
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• W2142654262 doi "https://doi.org/10.1109/essderc.2007.4430926" @default.
• W2142654262 hasPublicationYear "2007" @default.
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