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- W2143548008 abstract "Dominant bipolar transistor distortion sources are identified with respect to the biasing conditions. Mixed-level simulator results are compared with small- and large-signal measurements. An optimum epilayer design map for third-order intermodulation distortion is presented." @default.
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- W2143548008 date "2002-11-27" @default.
- W2143548008 modified "2023-09-26" @default.
- W2143548008 title "Optimum dimensions of the epilayer for third-order intermodulation distortion" @default.
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- W2143548008 doi "https://doi.org/10.1109/bipol.1998.741916" @default.
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