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- W2143558966 abstract "An RF on-chip filter using a Q-enhanced LC filter with digitally synchronized gain, center frequency (f0), and quality factor (Q) tuning is implemented in a standard 0.18 /spl mu/m CMOS process. The circuit consists of a new high-speed, wide-range, low-distortion, constant-gm OTA design and a new constant tunable discrete capacitor design that maximizes the linearity. The concept is illustrated through the design of a front-end RF filter operating at an f0 of 5.775 GHz. Simulation results show that the filtering Q can be digitally tuned from 6 to 65 while maintaining an f0 shifting within +-0.2%, gain variation 0.03 dB, 1-dB compression point (P/sub 1dB/) from -0.9 to 2.69 dBm, and dynamic range from 57 to 80 dB over the 100 MHz passband." @default.
- W2143558966 created "2016-06-24" @default.
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- W2143558966 date "2005-07-27" @default.
- W2143558966 modified "2023-09-25" @default.
- W2143558966 title "CMOS High-Linear Wide-Dynamic Range RF On-Chip Filters Using Q-enhanced LC Filters" @default.
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- W2143558966 doi "https://doi.org/10.1109/iscas.2005.1465992" @default.
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