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- W2144446918 abstract "This paper presents new approaches for testing VLSI array architectures used in the computation of the complex N-point fast Fourier transform. Initially, an unrestricted single cell-level fault model is considered. The first proposed approach is based on a process whose complexity is independent (or C- as constant) of the number of cells in the FFT architecture. This is accomplished by showing a topological equivalence between the FFT array and a linear (one-dimensional) array. The process of fault location is also analyzed. The second proposed method is based on a testing process whose complexity is linear with respect to the number of stages (columns) of the FFT array. A component-level fault model is also proposed and analyzed. The implications of this model on the C-testability process are fully described. >" @default.
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- W2144446918 date "2002-12-31" @default.
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- W2144446918 title "On the testability of FFT arrays" @default.
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- W2144446918 doi "https://doi.org/10.1109/etc.1993.246555" @default.
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