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• W2145539616 abstract "A study of static circuit partitioning algorithms for waveform relaxation (WR) on a multicomputer is presented. For such a computer there is an important tradeoff between the irregularity in partitioning and the achievable parallelism. Also, the importance of accuracy in certain steps in the partitioning calculation has been investigated. Topological methods are compared with several other methods which try to estimate the convergence factor for the WR iterations. For digital CMOS circuits it is found that only the close neighborhood to a circuit node (nearest neighbors) influences the value of the worst-case coupling. The conductive coupling is the essential part to consider in the partitioning. For a few circuits (mostly circuits with cross-coupling) the capacitive coupling must also be included in the partitioning. It is, however, hard to find an exact limit for the convergence factor estimate. >" @default.
• W2145539616 created "2016-06-24" @default.
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• W2145539616 date "2002-12-04" @default.
• W2145539616 modified "2023-09-26" @default.
• W2145539616 title "Tradeoffs in partitioning for waveform relaxation on multicomputers" @default.
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• W2145539616 doi "https://doi.org/10.1109/iscas.1990.112437" @default.
• W2145539616 hasPublicationYear "2002" @default.
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