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• W2146806184 abstract "A new methodology to increase the encoding efficiency of test compression based on linear feedback shift registers (LFSRs) is proposed. The proposed method combines LFSR reseeding and bit fixing. Deterministic test patterns tend to have a biased probability of the logic value 1 or 0 at each primary input. If such biased inputs are fixed to the logic value 1 or 0 with some combinational logic, then the amount of data to be encoded by the LFSR will be considerably reduced. Additionally, in order to reduce the encoded data volume much further, a variable degree of the LFSR polynomial is employed. In the variable-degree LFSR scheme, a test cube with less specified bits is encoded with an LFSR polynomial of lower degree, while a test cube with more specified bits is encoded with an LFSR polynomial of higher degree. Experimental results for the larger ISCAS 89 benchmark circuits show that the proposed scheme can increase the encoding efficiency with little hardware overhead compared to previous schemes." @default.
• W2146806184 created "2016-06-24" @default.
• W2146806184 creator A5068528309 @default.
• W2146806184 creator A5085286927 @default.
• W2146806184 date "2006-05-01" @default.
• W2146806184 modified "2023-09-25" @default.
• W2146806184 title "Increasing encoding efficiency of LFSR reseeding-based test compression" @default.
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• W2146806184 doi "https://doi.org/10.1109/tcad.2005.855977" @default.
• W2146806184 hasPublicationYear "2006" @default.
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