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- W2146875400 abstract "An analytical model for the grain-barrier height of the intrinsic poly-Si thin-film transistors (TFTs) is developed, in which the grain-barrier height for the applied gate voltage smaller than the threshold voltage is obtained by solving the charge neutrality equation and the grain-barrier height for the applied gate voltage larger than the threshold voltage is obtained by using the quasi-two-dimensional (2-D) method. Good agreements between experimental and simulation results are obtained for a wide gate voltage range." @default.
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- W2146875400 date "1998-01-01" @default.
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- W2146875400 title "An analytical grain-barrier height model and its characterization for intrinsic poly-Si thin-film transistor" @default.
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- W2146875400 doi "https://doi.org/10.1109/16.725260" @default.
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