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- W2148250507 abstract "A stacked FET, single-stage 45-GHz (Q-band) CMOS power amplifier (PA) is presented. The design stacked three FETs to avoid breakdown while allowing a high supply voltage. The IC was implemented in a 45-nm CMOS SOI process. The saturated output power exceeds 18 dBm from a 4-V supply. Integrated shielded coplanar waveguide (CPW) transmission lines as well as metal finger capacitors were used for input and output matching. The amplifier occupies an area of 450×500 im <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> including pads, while achieving a maximum power-added-efficiency (PAE) above 20%." @default.
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- W2148250507 date "2011-10-01" @default.
- W2148250507 modified "2023-09-29" @default.
- W2148250507 title "A Q-Band Amplifier Implemented with Stacked 45-nm CMOS FETs" @default.
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- W2148250507 doi "https://doi.org/10.1109/csics.2011.6062465" @default.
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