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- W2149587907 abstract "In order to meet the increasing demands for smaller, higher functionality-integrated low cost package, original device manufacturers (ODM's) and their suppliers develop new semiconductor devices and packaging technologies through silicon (Si) integration. The high levels of Silicon (Si) integration for baseband functions have lesser development time due to the system level integration of ASICs (application specific ICs) and the common CMOS processing for baseband functions. The memory and RF functionality is now being accomplished through specific packaging advancement or in system in a chip (SiP) package (Kada and Smith, 2000). This paper closely discussed advancement and solution technology that can further integrate diverse device technologies - the development of the wire bond + flip chip-chip scale package, a package that can combine flash, SRAM and DRAM memory as well as baseband, mixed signal and logic functions. This paper discussed the optional similar future packages for high-density trace routing and thermal improvement demand." @default.
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- W2149587907 date "2006-07-10" @default.
- W2149587907 modified "2023-09-24" @default.
- W2149587907 title "Wire bond, flip-chip, and chip-scale-package solution to high silicon integration" @default.
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- W2149587907 doi "https://doi.org/10.1109/ectc.2006.1645838" @default.
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