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• W2152321821 abstract "The authors describe new strategies where at-speed scan tests can be applied with internal PLL. They present techniques for optimizing ATPG across multiple clock domains and methodologies to combine both stuck-at-fault and delay-test vectors into an effective test suite." @default.
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• W2152321821 date "2003-09-01" @default.
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• W2152321821 title "High-frequency, at-speed scan testing" @default.
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• W2152321821 doi "https://doi.org/10.1109/mdt.2003.1232252" @default.
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