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- W2154266954 abstract "In this paper, a CMOS image sensor featuring a novel spiking pixel design and a robust digital intermediate read-out is proposed for deep submicron CMOS technologies. The proposed read-out scheme exhibits a relative insensitivity to the ongoing aggressive scaling of the supply voltage. It is based on a novel compact spiking pixel circuit, which combines digitizing and memory functions. Illumination is encoded into a Gray code using a very simple yet robust Gray 8-bit counter memory. Circuit simulations and experiments demonstrate the successful operation of a 64 64 image sensor, implemented in a 0.35 CMOS technology. A scalability analysis is presented. It suggests that deep sub-0.18 will enable the full potential of the proposed Gray encoding spiking pixel. Potential applications include multiresolution imaging and motion detection." @default.
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- W2154266954 date "2008-01-01" @default.
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- W2154266954 title "Robust Intermediate Read-Out for Deep Submicron Technology CMOS Image Sensors" @default.
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- W2154266954 doi "https://doi.org/10.1109/jsen.2007.912783" @default.
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