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- W2154516681 abstract "No-flow underfill process has been widely accepted as a key technology to implement low-cost, high-throughput flip on board (FCOB) assembly because of the elimination of processing steps such as flux application, flux residue cleaning, capillary underfill flow and secondary thermal curing of the underfill. While feasibility tests for the low-cost, high-throughput flip assembly based on no-flow underfill over a wide range of flip configurations are underway, unfamiliar process defects that have not been observed in the conventional capillary flow process are newly emerging. Of those new process defects, chip over the board surface after placement process is a critical issue that may significantly impact process yield when process variables are not properly controlled. It was found that much of the yield losses observed post reflow is attributed to the chip floating. In order to understand the underlying physics of the floating phenomena and predict process variables to eliminate the process defects, a process model has been. developed. The critical process variables include placement speed, placement force, dwell time, deposited underfill mass and underfill material properties such as viscosity, density, surface tension, wetting speed on the board, etc. A test and board was made such that floating over the board can be detected by testing the electric continuity of the path connecting the and board via the solder bumps. The effects of the critical process variables on the floating are investigated by a series of experiments and the results are compared to the theoretical model prediction for the model validation." @default.
- W2154516681 created "2016-06-24" @default.
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- W2154516681 date "2003-06-25" @default.
- W2154516681 modified "2023-09-26" @default.
- W2154516681 title "No-flow underfill process modeling and analysis for low cost, high throughput flip chip assembly" @default.
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- W2154516681 doi "https://doi.org/10.1109/ectc.2002.1008290" @default.
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