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- W2158355659 abstract "A single chip speech synthesizer was designed using a switched-capacitor multiplier to implement the LPC algorithm. The chip contains the LPC-10 filter, 20 kbit ROM, all control logic, a three-pole switched-capacitor low-pass filter, and an audio amplifier capable of driving a speaker directly. The chip was fabricated in 5 μm CMOS technology and is 218 mils on the side." @default.
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- W2158355659 date "1983-02-01" @default.
- W2158355659 modified "2023-10-18" @default.
- W2158355659 title "A single chip speech synthesizer using a switched-capacitor multiplier" @default.
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- W2158355659 doi "https://doi.org/10.1109/tassp.1983.1164008" @default.
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