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- W2159517827 abstract "We present a distributed algorithm for automatic test generation for sequential circuits. Our system uses a network of workstations by partitioning the fault list. Multiple test generation processes are run on separate processors. Unlike a prior implementation, the communication of detected faults among processors is asynchronous, with all computers processing and broadcasting detected faults without synchronization. We thus accomplish a reduction in duplicated computation and a general improvement in the speedup as compared to the synchronized parallelization. Experimental results demonstrate superlinear speedups for some of the benchmark circuits. A mathematical model is presented to explain the speedups." @default.
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- W2159517827 date "2002-11-19" @default.
- W2159517827 modified "2023-09-25" @default.
- W2159517827 title "An asynchronous algorithm for sequential circuit test generation on a network of workstations" @default.
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- W2159517827 doi "https://doi.org/10.1109/icvd.1995.512074" @default.
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