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- W2160998841 abstract "In this paper, we focus on test pattern generation from behavioral circuit descriptions written in VHDL. While several approaches were presented in the recent past to solve this problem, none of them can deal with behavioral circuit descriptions containing loop constructs of VHDL. We therefore propose a method to generate test patterns for such circuit descriptions and we give the corresponding algorithms. A step-by-step execution of the algorithms is performed on two pedagogical examples in order to illustrate our approach." @default.
- W2160998841 created "2016-06-24" @default.
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- W2160998841 date "1994-01-01" @default.
- W2160998841 modified "2023-09-25" @default.
- W2160998841 title "Algorithms for behavioral test pattern generation from VHDL circuit descriptions containing loop language constructs" @default.
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