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- W2161431358 abstract "Hardware and simulation results for a 370 MHz memory built-in self-test state machine are presented. Dynamic differential cascode voltage switch logic, unique clocking techniques, and logic pipelining were used to achieve the 370 MHz performance. Testing of multiple SRAMs and content addressable memories is accomplished with deterministic patterns generated by the state machine. Inclusion of a programmable pattern implemented via scan initialization provides test-pattern flexibility. Failing addresses are stored for redundancy implementation. >" @default.
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- W2161431358 date "1995-03-06" @default.
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- W2161431358 title "A 370-MHz memory built-in self-test state machine" @default.
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- W2161431358 doi "https://doi.org/10.5555/787258.787427" @default.
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