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- W2162013772 abstract "This paper presents an application specific reconfigurable architecture based on coarse-grain FPGA for real-time parallel particle filters. The architecture consists of a set of heterogeneous arithmetic units and buffer banks, where their interconnections are reconfigurable at the hardware level. The proposed architecture separates fixed and reconfigurable units for high-throughput realization. We compare potential throughput of the design with that of commercial FPGAs and DSPs. The proposed architecture is implemented in 0.25 /spl mu/m CMOS process." @default.
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- W2162013772 date "2004-03-02" @default.
- W2162013772 modified "2023-10-10" @default.
- W2162013772 title "Application specific coarse-grained FPGA for processing element in real time parallel particle filters" @default.
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- W2162013772 doi "https://doi.org/10.1109/iwsoc.2003.1213018" @default.
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