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- W2162207536 abstract "Integrated photonic interconnects have emerged recently as a potential solution for relieving on-chip and chip-to-chip bandwidth bottlenecks for next-generation many-core processors. To help bridge the gap between device and circuit/system designers, and aid in understanding of inherent photonic link tradeoffs, we present a set of link component models for performing interconnect design-space exploration connected to the underlying device and circuit technology. To compensate for process and thermal-induced ring resonator mismatches, we take advantage of device and circuit characteristics to propose an efficient ring tuning solution. Finally, we perform optimization of a wavelength-division-multiplexed link, demonstrating the link-level interactions between components in achieving the optimal degree of parallelism and energy-efficiency." @default.
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- W2162207536 date "2011-09-01" @default.
- W2162207536 modified "2023-10-18" @default.
- W2162207536 title "Addressing link-level design tradeoffs for integrated photonic interconnects" @default.
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- W2162207536 doi "https://doi.org/10.1109/cicc.2011.6055363" @default.
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