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- W2162733116 abstract "A clamped-bit-line sense amplifier (CBLSA) capable of very high-speed operation in one-transistor (1T) DRAM applications has been developed. Results from an experimental test chip demonstrate that the speed of the new circuit is insensitive to bit-line capacitance. Circuit speed is also found to be insensitive to the initial bit-line difference voltage. The CBLSA maintains a low impedance fixed potential on the bit lines during sensing, virtually eliminating sensitivity to inter-bit-line noise coupling and minimizing power supply bounce during sensing. The new sense amplifier operates at higher speeds than conventional circuits and still dissipates less power.< <ETX xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>></ETX>" @default.
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- W2162733116 date "1992-04-01" @default.
- W2162733116 modified "2023-10-01" @default.
- W2162733116 title "A high-speed sensing scheme for 1T dynamic RAMs utilizing the clamped bit-line sense amplifier" @default.
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- W2162733116 doi "https://doi.org/10.1109/4.126552" @default.
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