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- W2162767923 abstract "Skew calibration and compensation are critical ATE features for reliable functional test, particularly for applications such as memory chips. This paper presents a new Time-to-Digital Converter (TDC) design for off-chip skew calibration from Time Domain Reflectometry (TDR)measurements. It consists of coarse and fine parts which enable the circuit to detect a large skew range with high resolution. Circuit complexity is reduced through use of the proposed automatic edge detection methods which control coarse/fine operations. We also present skew compensation circuits which can de-skew off-chip signals based on the skew calibration. The TDC occupies a small area, making it suitable for implementation in a Built-Off Test (BOT) chip.The circuits were implemented using a 130nm technology in a Built-Off Test Interface (BOTI) developed for 800Mbps DDR2 memory functional test." @default.
- W2162767923 created "2016-06-24" @default.
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- W2162767923 date "2009-05-01" @default.
- W2162767923 modified "2023-09-27" @default.
- W2162767923 title "Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip" @default.
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- W2162767923 doi "https://doi.org/10.1109/ets.2009.20" @default.
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