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- W2164493372 abstract "High level test synthesis (HLTS), a term introduced in recent years, promises automatic enhancement of testability of a circuit. The authors show how HLTS can achieve higher testability for BIST oriented test methodologies. Their results show considering testability during high-level synthesis, better testability can be obtained when compared to DFT at low level. Transformation for testability, which allows behavioral modification for testability, is a very powerful HLTS technique." @default.
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- W2164493372 date "2002-11-23" @default.
- W2164493372 modified "2023-09-27" @default.
- W2164493372 title "High level test synthesis across the boundary of behavioral and structural domains" @default.
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- W2164493372 doi "https://doi.org/10.1109/iccd.1997.628932" @default.
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