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• W2165200242 abstract "A chip-scale package has been developed comprising an area-array bond pad die, solder bumped and mounted on a metallic frame. The die is fully encapsulated by an epoxy molding compound. Openings in the encapsulation are created corresponding to the bumps on the die. This allows interconnection from the die to the printed circuit board (PCB) through solder balls. Conventional mold compound, die attach and alloy 42 materials were used. The packaging process takes advantage of existing packaging techniques. This eliminates the costly development of new technology and equipment. Prototypes have been built and subjected to reliability tests. The package is very robust and had passed the JEDEC moisture sensitivity Level 1 test and 1000 cycles of liquid-to-liquid thermal shock test, according to Military Standard 833, Condition C (-65/spl deg/C to 150/spl deg/C)." @default.
• W2165200242 created "2016-06-24" @default.
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• W2165200242 date "2002-11-22" @default.
• W2165200242 modified "2023-09-27" @default.
• W2165200242 title "Low cost chip-scale package" @default.
• W2165200242 cites W2097412897 @default.
• W2165200242 doi "https://doi.org/10.1109/ectc.1997.606193" @default.
• W2165200242 hasPublicationYear "2002" @default.
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