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- W2166176543 abstract "This paper reports on the development of a new high speed modular data acquisition architecture, capable of covering the most demanding applications in what concerns sampling time and the combination of sampling time with memory per channel capability, along with sophisticated functionality for easy system integration. The modular architecture proposed also addresses directly the common problem of trigger generation and delivery by implementing a large (several tens of Mbytes), low cost, circular memory. This allows for a large delay in the delivery time of the trigger signal (up to tens of milliseconds while acquiring data at 1 GSPS) without incurring any data lost or dead time." @default.
- W2166176543 created "2016-06-24" @default.
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- W2166176543 date "2002-11-11" @default.
- W2166176543 modified "2023-09-24" @default.
- W2166176543 title "Innovative high-speed data acquisition architecture" @default.
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- W2166176543 doi "https://doi.org/10.1109/nssmic.2000.949969" @default.
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