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- W2166222777 abstract "This paper investigates pipelining methodologies for the ultra low voltage regime. Based on an analytical model and simulations, we propose a pipelining technique that provides higher energy efficiency and performance than conventional approaches to ultra low voltage design. Two-phase latch based design and sequential circuit optimizations are also proposed to further improve energy efficiency and performance. Silicon results demonstrate a 16b multiplier using the approaches in 65nm CMOS improve energy efficiency by 30% and performance by 60%." @default.
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- W2166222777 date "2011-06-05" @default.
- W2166222777 modified "2023-09-23" @default.
- W2166222777 title "Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design" @default.
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- W2166222777 doi "https://doi.org/10.1145/2024724.2024943" @default.
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