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- W2166455209 abstract "In this paper we motivate the explicit validation of hold-time violations in silicon and propose a method for doing so. New hold-time failure model and test pattern generation methodologies are defined.We outline conditions under which these tests can be applied reliably. We present results of applying these test patterns on a microprocessor and discuss the implications of intermittent failures on the relevance of hazards during timing analysis." @default.
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- W2166455209 date "2006-01-01" @default.
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- W2166455209 title "Hold time validation on silicon and the relevance of hazards in timing analysis" @default.
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- W2166455209 doi "https://doi.org/10.1145/1146909.1146994" @default.
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