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• W2166698142 abstract "A simple model is derived and verified for evaluating the effect of parasitic capacitances on the dead-time related voltage distortion in multilevel NPC voltage source inverters. The model permits well-defined and precise compensation of dead-time distortion, exhibiting meaningful improvement on compensation methods neglecting the effects of parasitic capacitances. A simple formula is given for evaluating the capacitances as serial / parallel connections of transistor capacitances and external capacitances (introduced by the cables and load)." @default.
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• W2166698142 date "2011-06-01" @default.
• W2166698142 modified "2023-09-25" @default.
• W2166698142 title "Modeling the effect of parasitic capacitances on the dead-time distortion in multilevel NPC inverters" @default.
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• W2166698142 doi "https://doi.org/10.1109/isie.2011.5984442" @default.
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