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- W2182071630 abstract "The objective of this work is to design and implement wireless Multi Channel DAQ using FPGA. The method of implementing the proposed design is the system on-chip via field programmable gate array (SoC-FPGA) to reduce the hardware size and for memory size. Using this multichannel data acquisition card we can read upto eight process signals at a time. This project would be very much useful to read multiple process parameters like pollution in an industrial environment. The multichannel ADC transmits the process information to the microcontroller. We can also assign set point values for the process parameters and if the value of the parameter exceeds or goes below the set point value the display will indicate the same using annunciate. The VHDL code can be simulated to verify its functionality. Then gate level design equivalent will be synthesized targeting FPGA. The real physical design will be laid by place and route method. At least the soft-core design is down loaded into chip. Application software is used for Design Entry and Simulation." @default.
- W2182071630 created "2016-06-24" @default.
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- W2182071630 date "2014-01-01" @default.
- W2182071630 modified "2023-09-26" @default.
- W2182071630 title "DESIGN AND IMPLEMENTATION OF ON-CHIP MULTICHANNEL DAQ ALGORITHM USING FPGA" @default.
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- W2182071630 hasPublicationYear "2014" @default.
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