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• W2182547011 abstract "Radio frequency identification technology is rapidly becoming commercially significant, with volumes in the billions of units per year predicted for the next few years. In this extremely pricesensitive market, chip size is critical, but at the same time, ever more powerful standards and stringent requirements for reliability require MHz data rates. The papers in this session push the frontiers of RFID size and performance. In the second half of the session, mechanical resonators, integrated FBARs and MEMS, promise to integrate high-quality RF filters and oscillators directly with transistors. Novel physical structures enable extremely high-performance oscillators and LNAs. A 0.15×0.15mm 2 7.5µm-thick RFID chip in a 0.18µm SOI CMOS technology containing a 128b ROM is presented in Paper 17.1. An SOI buried oxide layer structure acts as an etch stop to enable aggressive thinning. Contact to the antenna is made from both top and bottom of the die. In Paper 17.2, a passive UHF RFID tag, fabricated in 0.35µm FeRAM CMOS technology, with a 36.6% rectifier efficiency is described. This high efficiency is made possible by a CMOS full-wave rectifier with a ferroelectric capacitor. The chip boasts a read and write range of 4.3m and can support read rates of 129 tags/s. A 3.4Mb/s 13.56MHz RFID front-end is presented in Paper 17.3. The front end uses multi-level signaling and is fabricated in a 6M 0.18µm 1.8V digital CMOS process technology. The session continues with Paper 17.4, where a novel artificial dielectric is presented which takes the place of an LC tank in a high-quality oscillator. The 60GHz VCO in 90nm CMOS occupies only 0.015mm 2 , consumes 1.9mW, and has a measured phase noise of -100dBc/Hz at 1MHz offset. In Paper 17.5, a 5.4GHz 0.35µm BiCMOS SiGe FBAR oscillator is presented. The resonator is integrated directly above a silicon IC, and achieves a phase noise of -117.7 dBc/Hz at 100kHz offset while drawing 1.7mA from 2.7V. In Paper 17.6, a single-ended input to balanced output 425MHz electromechanical filter is introduced. The technology provides 1MHz channel-select filtering, while eliminating the need for RF switches and baluns in front-end transceivers, and brings the filter performance to 8dB insertion loss with -50dB stop-band rejection and -48dB common-mode suppression. A low-power 2.4GHz heterodyne receiver front-end in 0.18µm CMOS using BAW solidly-mounted resonators is presented in Paper 17.7. The resonators, with Qs of up to 580, provide both impedance matching and selectivity. An image rejection of up to 50dB, a noise figure of 11dB and IIP3 of -16.1dBm with a power dissipation of 1.8mW are demonstrated." @default.
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• W2182547011 date "2006-01-01" @default.
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• W2182547011 title "Session 17 Overview RFID and RF Directions" @default.
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