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- W2183303684 abstract "In the scaling of MOS devices requires use of ultra-thin gate oxides to maintain a reasonable short channel effect. Such thin oxides give rise to high electric fields, resulting in considerable direct tunneling current. For CMOS devices with thicker oxides, the major leakage mechanism is sub-threshold current, which increases due to the short channel effect. Hence, circuit techniques used to control sub-threshold leakage need to be reinvestigated to evaluate their effectiveness in improving the overall leakage current. The transistor stacking technique is proven to be extremely effective in lowering sub-threshold leakage in the standby-mode of operation of a circuit. This paper presents to determine the input vector that minimizes leakage current of nanometer CMOS circuits during sleep mode considering stack effect. (Vijay Kumar Sharma. Study of Leakage Power, Controlled by Input Vector Technique. Report and Opinion 2011;3(3):40-43). (ISSN: 1553-9873). http://www.sciencepub.net ." @default.
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- W2183303684 date "2011-01-01" @default.
- W2183303684 modified "2023-09-27" @default.
- W2183303684 title "Study of Leakage Power, Controlled by Input Vector Technique" @default.
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