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- W2184333401 abstract "ScopeElectronic systems are required to operate under extreme temperatures in NASA planetaryexploration and deep space missions. Electronics on-board spacecraft must also tolerate thermalcycling between extreme temperatures. Thermal management means are usually included intoday’s spacecraft systems to provide adequate temperature for proper operation of theelectronics. These measures, which may include heating elements, heat pipes, radiators, etc.,however add to the complexity in the design of the system, increases its cost and weight, andaffects its performance and reliability. Electronic parts and circuits capable of withstanding andoperating under extreme temperatures would reflect in improvement in system’s efficiency,reducing cost, and improving overall reliability.Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly forhigh temperature applications and find extensive use in terrestrial well-logging fields. Theirinherent design offers advantages over silicon devices in terms of reduced leakage currents, lesspower consumption, faster switching speeds, and good radiation tolerance. Little is known,however, about their performance at cryogenic temperatures and under wide thermal swings.Experimental investigation on the operation of SOI, N-channel field effect transistors under widetemperature range was reported earlier [1]. This work examines the performance of P-channeldevices of these SOI transistors.The electronic part investigated in this work comprised of a Cissoid’s CHT-PMOS30, hightemperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2].This high voltage, medium-power transistor is designed for geothermal well logging applications,aerospace and avionics, and automotive industry, and is specified for operation in thetemperature range of -55 °C to +225 °C. Table I shows some specifications of this transistor [2].The CHT-PMOS30 device was characterized at various temperatures over the range of -190 °Cto +225 °C in terms of its voltage/current characteristic curves. The test temperatures included+22, -50, -100, -150, -175, -190, +50, +100, +150, +175, +200, and +225 °C. Limited thermalcycling testing was also performed on the device. These tests consisted of subjecting thetransistor to a total of twelve thermal cycles between -190 °C and +225 °C. A temperature rate ofchange of 10 °C/min and a soak time at the test temperature of 10 minutes were used throughoutthis work. Post-cycling measurements were also performed at selected temperatures. In addition,re-start capability at extreme temperatures, i.e. power switched on while the device was soakingfor a period of 20 minutes at the test temperatures of -190 °C and +225 °C, was investigated." @default.
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- W2184333401 date "2009-01-01" @default.
- W2184333401 modified "2023-09-27" @default.
- W2184333401 title "NASA Electronic Parts and Packaging Program Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures" @default.
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