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- W2186486503 abstract "Clock skew minimization plays an important role in VLSI interconnect design to assure enhanced performance of a chip. In this paper, we propose an Obstacle avoiding Rectilinear Clock tree construction algorithm. IP blocks, transistor cells, elongated wires, and redundant vias present on-chip are treated as obstacles, and cause extra delay around their boundaries while performing routing. Our proposed algorithm focuses on delay equalization at all the sink terminals from the source, avoiding obstacle edges. Delay equalization problem is formulated in a non cooperative game theoretic framework, where all the sink terminals are treated as players. The proposed method is maneuvered as follows. (1) Initially, the entire layout is divided into smaller rectangular or square subzones, called tiles, containing subset of sink terminals. (2) Next, center of masses (CMs) of the tiles are treated as individual players to play several strategies. Delay equalization is done in each CM sequentially by playing the set of predefined strategies. Delay difference or clock skew is treated as the payoff matrix, which it optimized/minimized in several iteration of the play. Nash equilibrium is also achieved by optimizing the payoff matrix. (3) Finally, the game is played in each tile to find out Nash equilibrium, where the sinks belonging to each tile are treated as the players during local game playing. This two stage process of global delay equalization at CMs, followed by local optimization leads to clock skew minimization in all the sink terminals from the source terminal. We adopt Elmore delay formula to calculate delay of a routing path, considering the resistive (R) and capacitive (C) effects of a wire. Proposed algorithm is run on some recent benchmark suits, and experimental results are quite encouraging." @default.
- W2186486503 created "2016-06-24" @default.
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- W2186486503 date "2013-01-01" @default.
- W2186486503 modified "2023-10-12" @default.
- W2186486503 title "Obstacle Avoiding Delay Equalization for Rectilinear Clock Tree Routing based on a Game Theoretic Approach" @default.
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