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- W2187604513 abstract "this paper presents a new design of CMOS Current Comparator with 0.25% improved speed at 400nA current with propagation delay 2.385ns. To achieve this current mirror, cascode current mirror circuit and intermediate gain stage is used. This helps to detect input current of nA to pA range at 1µA reference current and gives better rail to rail output voltage, with average slew rate. This design is implemented in cadence virtuoso UMC 180nm technology. The layout of proposed design is presented without DRC errors. Layout and schematics are matched with extraction of parasitic." @default.
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- W2187604513 date "2014-01-01" @default.
- W2187604513 modified "2023-09-27" @default.
- W2187604513 title "A Novel Intermediate Gain Stage Based CMOS Current Comparator in 180 Nm Technology" @default.
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