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- W2187789105 abstract "Almost Regular Permutation (ARP)andQuadratic Permutation Polynomials (QPP)aretwocommontypes ofinter- leavers forparallel turbodecoding. However, foraturbo decoder using suchaninterleaver, previous memory-mapping schemes are applicable onlyif, F,thenumberofprocessors used, divides L, theinterleaver length, andP satisfies various otherconstraints. Inthis paper, weintroduce anovel memory-mapping scheme that removes these restrictions andallows theusermoreflexibility indetermining thenumbersofprocessors tobeused,atthe expense ofsomeoverhead. I.INTRODUCTION Asthethroughput requirement incommunication systems increases, methods toparallelize thetraditional turbo decoding algorithm becomenecessary. In(2), Berrou etal.introduce interleavers usingalmost regular permutations (ARP)and showthata turbocodeusingsuchaninterleaver canbe decoded inparallel usingmultiple numberofprocessors. Another parallelization schemeisdeveloped forturbo codes using this interleaver in(3). Thislatter scheme isalso adopted byTakeshita forhisquadratic permutation polynomials (QPP) interleavers aspresented in(4). However, inallofthese existing schemes, thenumberof processors usedisrequired tobeafactor oftheinterleaver length and,inthecaseofARP interleavers, mustsatisfy certain additional constraints (asdetailed inSection IV). When implementing parallel turbo decoders, these requirements limit adesigner's flexibility indeciding theoptimal area-time-power trade-off. Thesituation worsensasmanycurrent systems employ asingle decoder that mustsupport awiderangeof interleaver lengths. Finding anappropriate numberofproces- sorsthat satisfies therestrictions imposed byall these different lengths maybeproblematic. Inthenextsection, theconcepts ofparallel turbo decoding andcollision-free memorymapping areformalized. Next, we showthat bothARP andQPPareperiodic interleavers when certain conditions aresatisfied. InSection IV,wegive areview oftheexisting memorymapping schemes forARP andQPP interleavers anddescribe their limitations. InSection V,we introduce anovel schemeforimplementing aturbo decoder using anarbitrary numberofprocessors anddemonstrate its application; theoverhead associated withthescheme will then beaddressed." @default.
- W2187789105 created "2016-06-24" @default.
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- W2187789105 date "2007-01-01" @default.
- W2187789105 modified "2023-09-27" @default.
- W2187789105 title "A FlexibleMemory-Mapping Scheme forParallel" @default.
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