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- W2189503184 abstract "numeric identification ofgates andprimary events, representa- tionoftheBoolean relationship (AND, OR)present ateach KeyWords-Fault tree, Bitmanipulation, Computerized fault tree gate, andtheordering ofthese appropriate tothesubsequent analysis, Boolean tree reduction. analysis (inthis case abottom-up sequence solvable bysequen- tial substitution). Toobtain theminimal cutsets, three types Reader Aids- Purpose: Efficient technique forcomputerized fault tree analysis oflogical redundancy mustthenbeidentified andeliminated: Special mathneeded forexplanation &results: Boolean algebra Results useful to:Engineers, Reliability andrisk analysts, Computer Redundant Factors (AA-A), (1) scientists Summary andConclusions-This paper describes anefficient tech- Subset Redundancy (A+AB A)," @default.
- W2189503184 created "2016-06-24" @default.
- W2189503184 date "1978-01-01" @default.
- W2189503184 modified "2023-09-26" @default.
- W2189503184 title "Fault tree analysis using bit manipulation" @default.
- W2189503184 doi "https://doi.org/10.1016/0026-2714(78)90610-8" @default.
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