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- W2196915969 abstract "This paper proposes a fractional-N frequency synthesizer based on sub-sampling PLL(SSPLL). Despite of the low phase noise and the low jitter performance, it is difficult to make a fractional-N synthesizer based on SSPLL because of its dividerless characteristic. The proposed circuit enables the fractional-N synthesizer based on SSPLL using a flying adder structure. The synthesizer is implemented in a 65nm CMOS technology." @default.
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- W2196915969 date "2014-06-01" @default.
- W2196915969 modified "2023-09-24" @default.
- W2196915969 title "플라잉 가산기를 이용한 서브 샘플링 기반의 2.3GHz~3GHz Fractional-N 주파수 합성기" @default.
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