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- W2212474947 abstract "In this paper we present a scalable and flexible architecture that implements inter-processor communication (IPC) synchronization among FIFO channels for multimedia applications. We also compare it to the simple mail-box architecture, especially for tasks of finer granularity. With experimental results we confirmed the proposed architecture is suitable for various cases including a Motion JPEG example." @default.
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- W2212474947 date "2007-07-01" @default.
- W2212474947 modified "2023-09-26" @default.
- W2212474947 title "Hardware implementation of inter-processor communication in MPSoCs for multimedia applications" @default.
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