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- W2215941856 abstract "Outlines a design methodology for realising finite impulse response digital filters with fixed coefficients. The technique is based on the use of a primitive operator graph, which represents the filter multipliers using a minimum or near-minimum number of addition/subtraction operations. Vertex rearrangement, retiming and edge elimination techniques are then applied to form a logical graph with an efficient allocation of pipeline registers. An example of this process is given for a bit-serial realisation employing a bit-level pipeline. >" @default.
- W2215941856 created "2016-06-24" @default.
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- W2215941856 date "1988-12-15" @default.
- W2215941856 modified "2023-09-26" @default.
- W2215941856 title "A design methodology for the realisation of dedicated function VLSI digital filters" @default.
- W2215941856 hasPublicationYear "1988" @default.
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