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• W2223803009 abstract "The paper has been included the strategy about the current comparator. Therefore it has been contained or designed a different number of parameters after fabricating the circuit of the device. Here in designing of current comparator circuitry are using a current mirror circuitry designing, that type of circuit should be worked on boosting the higher speed of the system. After boosting the device it have been pulse range calculated from milli-ampere to pico-ampere. The device is using for contrasting the signal called comparator. Mainly parameters are calculated delay of the system for speed and also finding the signal to noise ratio with leakage (current or power). In this chapter the analytical comparison of various type of comparator designed, are given. The designing parameters of proposed comparator are calculated with previous year designed comparator parameters and after formulating the results of parameter the leakage (current has been calculated 6.868μA and the power has been measured 2.866μW) .The power dissipation has been measured 13.94μW with reduction of delay 7%. Keywords: Power dissipation, propagation delay, speed, current comparator, cadence tool." @default.
• W2223803009 created "2016-06-24" @default.
• W2223803009 creator A5075830851 @default.
• W2223803009 date "2015-06-08" @default.
• W2223803009 modified "2023-09-23" @default.
• W2223803009 title "Reduce Leakage Current and Average Power CMOS Current Comparator" @default.
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• W2223803009 doi "https://doi.org/10.15864/ajec.v2i3.123" @default.
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